Opportunity Description
DEEPX, a forward‑looking NPU company, seeks a verification engineer to define verification plans for complex SoC interconnects and to build advanced UVM/SystemVerilog environments.
You will verify AXI/CHI/ACE interfaces, analyze throughput and latency, debug RTL, and drive 100% verification closure, collaborating with design and software teams. This on‑site role offers a chance to work with cutting‑edge AI hardware and energy‑efficient architectures at a fast‑growing startup.
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