Senior Asic Verification Engineer At Synopsys Montreal

Enhance your career with Synopsys as a Senior ASIC Design Verification Engineer focused on HBM products.

Utilize your expertise in digital verification and develop advanced testcases for innovation. In this role, you will leverage over 10 years of experience in digital design and verification at Synopsys.

Key Responsibilities:

• Develop comprehensive verification plans for HBM products
• Write and maintain advanced testcases using SystemVerilog and UVM
• Debug complex testbench and design issues collaboratively
• Automate verification flows with Python or Perl scripting
• Review design specifications and provide constructive feedback

Requirements:

• Bachelor’s or Master’s in Electrical Engineering
• 10+ years of digital design/verification experience
• Proven skills in SystemVerilog/UVM
• Solid debugging and digital circuit design knowledge
• Ability to work independently...