Senior Asic Design Engineer – Rtl, Synthesis & Ai/Hpc Socs - C$140,000 - C$190,000 A Year (Toronto)

Senior ASIC Design Engineer – RTL, Synthesis & AI/HPC SoCs

Salary: C$140,000 – C$190,000 per year (Toronto)

Company: BTA Design Services

Location: Toronto, Canada

We are seeking a Senior ASIC Design Engineer with 8+ years of experience to translate requirements into architecture specifications and design complex RTL logic using Verilog and System Verilog.