Opportunity Description
**Position:**
Physical Design Engineer II (eInfochips Inc)
**Job Description:**
**What You'll Be Doing:**
+ Execute synthesis, PNR, and STA for assigned partitions of ASIC chip adhering to strict schedules and design goals.
+ Work closely with architects, RTL designers, and DFT engineers to resolve implementation and signoff issues across your blocks.
+ Help close EM/IR, drive LEC and physical verification signoff for your partitions in coordination with methodology owners.
+ Partner with the design team to proactively identify and address potential physical design challenges, enabling efficient iteration and convergence.
+ Contribute to the refinement of other implementation and physical design methodologies, encompassing synthesis, place and route (PnR), electromigration and IR (EMIR), power delivery network (PDN), and logical equivalence checking (LEC).
+ Troubleshoot flow issues and collaborate with EDA vendors to resolve them as needed....
Physical Design Engineer II (eInfochips Inc)
**Job Description:**
**What You'll Be Doing:**
+ Execute synthesis, PNR, and STA for assigned partitions of ASIC chip adhering to strict schedules and design goals.
+ Work closely with architects, RTL designers, and DFT engineers to resolve implementation and signoff issues across your blocks.
+ Help close EM/IR, drive LEC and physical verification signoff for your partitions in coordination with methodology owners.
+ Partner with the design team to proactively identify and address potential physical design challenges, enabling efficient iteration and convergence.
+ Contribute to the refinement of other implementation and physical design methodologies, encompassing synthesis, place and route (PnR), electromigration and IR (EMIR), power delivery network (PDN), and logical equivalence checking (LEC).
+ Troubleshoot flow issues and collaborate with EDA vendors to resolve them as needed....
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