Opportunity Description
Join Synopsys as a Lead Verification Manager in SERDES PHY, where deep technical expertise meets leadership. Oversee mixed-signal verification while directly engaging in debugging and team development.
As a seasoned professional with over ten years in ASIC mixed-signal verification, you will lead a distributed team at Synopsys. The focus of this role is on high-performance SERDES PHY IP, where you will drive quality and release readiness during project escalations. Hands-on technical leadership is crucial, along with mentoring engineers to enhance their skills and ensure robust verification outcomes.
Key Responsibilities:
• Lead a team on SERDES PHY mixed-signal verification
• Debug essential regressions and customer issues directly
• Ensure sign-off quality and effective release readiness
• Define UVM methodology and regression standards
• Collaborate with design, firmware, and applications teams
Requirements:
• 10+ years in ASIC mixed-signal verification
As a seasoned professional with over ten years in ASIC mixed-signal verification, you will lead a distributed team at Synopsys. The focus of this role is on high-performance SERDES PHY IP, where you will drive quality and release readiness during project escalations. Hands-on technical leadership is crucial, along with mentoring engineers to enhance their skills and ensure robust verification outcomes.
Key Responsibilities:
• Lead a team on SERDES PHY mixed-signal verification
• Debug essential regressions and customer issues directly
• Ensure sign-off quality and effective release readiness
• Define UVM methodology and regression standards
• Collaborate with design, firmware, and applications teams
Requirements:
• 10+ years in ASIC mixed-signal verification
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