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Lead Design Engineer

Cadence Design Systems, Inc.

Pune, Maharashtra, India Full time June 12, 2026
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Opportunity Description

Description

(what the role does)
  • Technical interface for customer
  • Support customer Pre-post silicon SOC teams from initial PCIe Controller integration and bring-up.
  • Work closely with PCIe R&D team and Field Application Engineers
  • Update PCIe team with the latest customer feedback and competitive analysis.
  • Work closely with Physical design team and RTL team to understand chip architecture, hierarchy.
  • Perform RTL simulation to verify functionality.

    • We’re doing work that matters. Help us solve what others can’t.

    Full time Engineers

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    Opportunity Details

    Location Pune, Maharashtra
    Country India
    Type Full time
    Category Engineers
    Posted June 12, 2026
    Deadline July 22, 2026

    About Cadence Design Systems, Inc.

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    Cadence Design Systems, Inc.

    Pune, India