Opportunity Description
Drive innovation as a Lead ASIC Verification Engineer at Synopsys, focusing on advanced HBM solutions. Utilize your expertise in digital verification in a collaborative team environment.
In this pivotal role, you will lead the verification processes for ASIC designs. With over 10 years of digital verification experience, your skills in mentoring junior engineers and driving product reliability will be significant. You'll tackle complex challenges and contribute to the future of AI and computing technology.
Key Responsibilities:
• Develop verification plans for next-generation HBM products
• Write test cases using SystemVerilog and UVM
• Analyze and debug design and testbench issues
• Automate verification workflows with Python or Perl
• Mentor engineers and participate in code reviews
Requirements:
• Master’s or Bachelor’s in Electrical Engineering
• 10+ years of experience in digital design/verification
In this pivotal role, you will lead the verification processes for ASIC designs. With over 10 years of digital verification experience, your skills in mentoring junior engineers and driving product reliability will be significant. You'll tackle complex challenges and contribute to the future of AI and computing technology.
Key Responsibilities:
• Develop verification plans for next-generation HBM products
• Write test cases using SystemVerilog and UVM
• Analyze and debug design and testbench issues
• Automate verification workflows with Python or Perl
• Mentor engineers and participate in code reviews
Requirements:
• Master’s or Bachelor’s in Electrical Engineering
• 10+ years of experience in digital design/verification
Interested in this opportunity? Apply now through Expertini.
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