Intern: Application Engineering - Formal Verification

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence Design Systems Inc. (https://www.cadence.com/) is looking for a motivated Intern: Application Engineering - Formal Verification to work with us in Belo Horizonte, Brazil.

As an Application Engineer Intern, you will be trained to become an expert in Formal Verification methodologies in the System Verification Group - Technical Field Operations (TFO-SVG) in Belo Horizonte. The TFO-SVG group works with Xcelium, Palladium, Protium, Jasper, VIPs, and other Cadence Digital Functional Verification tools. The application engineers provide technical support, enabling customers to effectively deploy our industry-leading technology, focused on RTL-level verification products. You will be trained in a Digital Verification & Simulation focused team working with our Jasper Formal Verification Platform, complimentary tools, and its customers to understand their needs ...