HSIO/DDR Bench Test Engineer

Company

QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA

Job Area

Engineering Group, Engineering Group > Hardware Engineering

General Summary

This position is for the Post Silicon Engineering group that develops test solutions for highly integrated SOCs (System on Chip). Main responsibilities include defining and executing the development of test methodologies and characterization of high‑speed SERDES interfaces such as PCIe, USB3, UFS, DP, MIPI (DSI, CSI), PLLs, and leading‑edge LP‑DDR & PC‑DDR subsystem components (DRAM, DRAM controller, mixed‑signal PHY IP, I/Os, clocking architecture, delay circuits, power distribution network) as well as other proprietary interfaces. Responsibilities include developing and executing characterization plans for high‑speed interfaces to optimize design parameters and validate electrical compliance, driving corresponding first‑silicon bring‑up & debug to qualify designs fabricated at exter...