Opportunity Description
Kick-start your career with Mixel-Egypt's 3-month Internship Program. Learn from experienced engineers, contribute to real engineering projects, and develop practical skills using industry-leading design methodologies, tools, and workflows in a collaborative, innovation-driven environment.
Qualifications
Bachelor’s degree of: Electronics Engineering.
Strong knowledge of Verilog RTL design/simulation
Knowledge of clock domain crossing (CDC) and reset domain crossing (RDC) techniques
Knowledge of ASIC/FPGA design flows including RTL Synthesis, Place and Route, and Timing Sign-off
Solid understanding of static timing analysis (STA) and timing constraints (SDC)
Desirable Qualifications and Experience:
Familiarity with System Verilog, UVM, RTL/gate ver...
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