Digital Design Engineer Prime (FEC) (Ottawa)

About the Role

As the global leader in high-speed connectivity, Ciena is committed to a people‑first approach and flexible work settings that empower individual growth, well‑being, and belonging. The Senior Digital Design Engineer will be an integral part of the team responsible for implementing industry‑standard and custom subsystems for Ciena’s Forward Error Correction (FEC) IP.

Responsibilities

• Read and understand architecture and functional requirements specification documents.
• Produce implementation specification documents and collaborate with systems engineers, DSP systems, and architects.
• Design, create, and integrate new and existing RTL and/or C source code, algorithms, and functions.
• Work independently to develop detailed design specifications for IP subcomponents and lead them through all design stages.
• Test and debug code during simulation and regression verification.
• Assist the verification te...