ASIC Design Verification Engineer Role at Synopsys

Advance your career as an ASIC Design Verification Engineer at Synopsys. Specialize in HBM product verification and apply your extensive digital design experience.
As a key player with over 10 years in digital design and verification, you will craft comprehensive verification plans and utilize SystemVerilog and UVM techniques. Engage closely with design teams to troubleshoot complex issues while using Python or Perl for automation.
Key Responsibilities:
• Create extensive verification plans for HBM products
• Write and maintain testcases using SystemVerilog and UVM
• Collaborate on debugging complex testbench problems
• Automate workflows with Python or Perl scripts
• Review design documents and provide analysis
Requirements:
• Bachelor’s or Master’s in Electrical Engineering
• 10+ years digital design/verification background
• Expertise in SystemVerilog and UVM methodologies
• Strong debugging capabilities in digital circuits
• Capacity to work i...