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ASIC Design Engineer

Chipright

Galway, Galway, Ireland Part Time July 05, 2026
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Opportunity Description


Senior Digital Design Engineer We’re looking for a Senior ASIC Digital Design Engineer

Experience required
  • RTL Design with system Verilog
  • Linting checks with spyglass
  • STA
  • Synthesis
  • Experience with formal verification would be a plus
    • Key Qualifications
  • BS/MS degree with a minimum of 8 years of related experience.
  • Proficient in scripting languages (Python, Tcl Perl, unix shell)
  • Familiar with RTL best design practices with SystemVerilog
  • Familiar with implementation and verification front end flows
  • Strong communication skills

    • Part Time Engineers

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    Opportunity Details

    Location Galway, Galway
    Country Ireland
    Type Part Time
    Category Engineers
    Posted July 05, 2026
    Deadline August 14, 2026

    About Chipright

    C

    Chipright

    Galway, Ireland